fpga en Gennio
Los mejores enlaces de fpga guardados en Gennio.
Altera
http://www.altera.com Pertenece a grupos
Web oficial de la compañia.
Procesador Nios II
http://www.altera.com/products/ip/processors/nios2/ni2-index.html Pertenece a grupos
Web oficial del microprocesador Nios II.
Procesador MicroBlaze
http://www.xilinx.com/products/design_resources/proc_central/microblaze.htm Pertenece a grupos
Web oficial del microprocesador MicroBlaze.
Altera (Wikipedia - Castellano)
http://es.wikipedia.org/wiki/Altera Pertenece a grupos
Descripción en la wikipedia de la empresa.
Altera (Wikipedia - Inglés)
http://en.wikipedia.org/wiki/Altera Pertenece a grupos
Descripción en la wikipedia de la empresa.
FPGA
http://es.wikipedia.org/wiki/FPGA
FPGA es el acronimo de Field-programmable gate array Matriz de puertas programable por campo Se trata de dispositivos electronicos digitales programables de muy alta densidad
FPGA
http://arantxa.ii.uam.es/~edcd/ed-temario.htm
Layout i4004. 12" (300mm) wafer. Línea del Tiempo en la Electrónica. Diseño Digital: Engranajes, Relés, válvulas, transistores, CircuitosIntegrados SSI, ...
Field-programmable gate array - Wikipedia, the free encyclopedia
http://en.wikipedia.org/wiki/Field-programmable_gate_array
Encyclopedia article, with links to many related topics on FPGA.
fpga4fun.com - Welcome
http://www.fpga4fun.com
fpga4fun.com - Welcome
kpicosim. A simulator and assembler for the picoblaze.
http://www.xs4all.nl/~marksix
kpicosim. A simulator and assembler for the picoblaze.
Icarus Verilog
http://icarus.com/eda/verilog
Free Verilog compiler.
ZXGATE
http://zxgate.sourceforge.net
ZX80, ZX81, Spectrum and Jupiter ACE implemented in an FPGA.
Reconfigurable Computing Primer - FPGAs, dynamic reconfiguration, con...
http://www.netrino.com/Articles/RCPrimer
Building computing systems out of FPGAs that can reconfigure themselves at runtime.
GPL Cver
http://www.pragmatic-c.com/gpl-cver
A free Verilog simulator.
Welcome to MyHDL [MyHDL]
http://myhdl.jandecaluwe.com/doku.php
A Python package for generating FPGA designs. Another instance of the concurrency-using-generators idea (as seen in Kamaelia), but using Python to generate FPGA code is novel.
David G. Conroy
http://homepage.mac.com/dgcx
FPGA versions of the PDP-4 and PDP-8, and some bits about the first Alpha PC that DEC made.
Welcome to MyHDL [MyHDL]
http://myhdl.jandecaluwe.com/doku.php/start
A tool for FPGA design in Python -- you write a Python program linking a load of generators together, and it compiles it to Verilog. Yet another nearly-process-oriented thing, but the simulation/compilation approach is neat.
OpenCiphers - Ciphering and FPGAs for cum and profit
http://openciphers.sourceforge.net/oc
OpenCiphers - Ciphering and FPGAs for cum and profit
Dr. Dobb's | Open Source Soft Microprocessors | Março 7, 2007
http://ddj.com/dept/cpp/197800817
Dr. Dobb's | Open Source Soft Microprocessors | Março 7, 2007
New Scientist Breaking News - Self-wiring supercomputer is cool and c...
http://www.newscientist.com/article.ns?id=dn7448&feedId=online-news_rss20
New Scientist Breaking News - Self-wiring supercomputer is cool an ...
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